Mitigating kernel dangers on 32-bit ARM

Satirically, at these low worth factors, the DRAM is definitely the dominant part when it comes to BOM price, and plenty of of those 32-bit ARM techniques incorporate an affordable ARMv8 SoC that occurs to be able to working in 64-bit mode as effectively. The explanation for working 32-bit purposes nonetheless is that these usually use much less of the costly DRAM, and could be deployed immediately with out the necessity to recompile the binaries. As 32-bit purposes do not want a 64-bit kernel (which itself makes use of extra reminiscence as a result of its inner use of 64-bit pointers), the product ships with a 32-bit kernel as an alternative.

If you happen to’re selecting to make use of a 32-bit kernel for its smaller reminiscence footprint, it is not with out dangers. You will probably expertise efficiency points, unpatched vulnerabilities, and sudden misbehaviors akin to:

• 32-bit kernels usually can’t handle greater than 1 GiB of bodily reminiscence with out resorting to HIGHMEM bouncing, and can’t present a full digital deal with house of 4 GiB to person house, as 64-bit kernels can.
• Facet channels or different flaws brought on by silicon errata could exist that have not been mitigated in 32-bit kernels. For instance, the hardening in opposition to Spectre and Meltdown vulnerabilities had been solely carried out for ARMv7 32-bit solely CPUs, and plenty of ARMv8 cores working in 32-bit mode should be weak (solely Cortex-A73 and A75 are dealt with particularly). And normally, silicon flaws in 64-bit elements that have an effect on the 32-bit kernel are much less more likely to be discovered or documented, just because the silicon validation groups don’t prioritize them.
• The 32-bit ARM kernel doesn’t implement the frilly alternate options patching framework that’s utilized by different architectures to implement dealing with of silicon errata, that are explicit to sure revisions of sure CPUs. As a substitute, on 32-bit multiplatform kernels, we merely allow all errata workarounds which may be wanted by any of the cores that will ever run the picture in query, probably affecting efficiency unnecessarily on cores that haven’t any want for them.
• Silicon distributors are phasing out 32-bit help in the long run. Given an ecosystem containing a handful of working techniques and hundreds of purposes, help for 32-bit working techniques (which is extra advanced technically) is very more likely to be dropped first. For merchandise with longer life cycles, long-term procurement contracts for elements accessible at this time are normally rather more expensive than adjusting the BOM over time and utilizing newer, cheaper elements.
• The 32-bit kernel doesn’t implement kernel deal with house randomization, and even when it did, its comparatively tiny deal with house merely leaves little or no house for randomization. Different hardening options, akin to rodata=full or hierarchical eXecute By no means attributes, are lacking as effectively on 32-bit, and should not more likely to be applied, both as a result of lack of help within the structure, or due to the complexity of the 32-bit reminiscence administration code, which nonetheless helps all the totally different structure revisions courting again to the preliminary Linux port working on the Risc PC.

Maintaining the 32-bit ARM kernel safe

There are instances, although, the place utilizing the 32-bit kernel is the one possibility, e.g., if the CPUs are actually 32-bit solely (which is the case even for some ARMv8 cores akin to Cortex-A32), or when counting on an current 32-bit solely codebase working within the kernel (drivers for legacy peripherals). Notice that in such instances, it nonetheless is sensible to make use of the newest kernel model suitable with the {hardware}, since we’re actually making an effort to allow a number of the current hardening options on 32-bit ARM as effectively.

• THREAD_INFO_IN_TASK for v7 SMP cores

The v5.16 launch of the Linux kernel implements help for THREAD_INFO_IN_TASK when working on ARMv7 SMP techniques. This protects the kernel’s per-task bookkeeping (known as thread_info), which lives on the far (and usually unused) finish of the stack, in opposition to stack overflows which can happen in uncommon -yet typically exploitable- instances the place the management move of this system merely finally ends up accumulating extra state than the stack can maintain. (Notice {that a} stack overflow is just not the identical as a stack buffer overflow, the place the overflow occurs in the wrong way.)

By transferring thread_info off the stack and into the kernel heap, and by utilizing a particular SMP CPU register to maintain monitor of its location, we will mitigate the danger of stack overflows leading to thread_info corruption. Nonetheless, it doesn’t stop stack overflows themselves: these should happen, and lead to corruption of different information buildings that occur to be adjoining to the duty stack in reminiscence.

• THREAD_INFO_IN_TASK for different cores

For CPUs that lack this particular SMP CPU register, we additionally proposed an implementation of THREAD_INFO_IN_TASK that’s anticipated to land in v5.18. As a substitute of a particular register, it makes use of a worldwide variable to maintain monitor of the situation of thread_info.

Stopping stack overflows from corrupting unrelated reminiscence contents is the aim of VMAP_STACK, which we’re enabling for 32-bit ARM as effectively. When VMAP_STACK is enabled, kernel mode stacks are allotted from the kernel heap as earlier than, however mapped into a unique a part of the kernel’s deal with house, and surrounded by guard areas, that are assured to be stored unpopulated. On condition that accesses to such unpopulated areas will set off an exception, the kernel’s reminiscence administration layer can step in and terminate this system as quickly as a stack overflow happens, and forestall it from inflicting reminiscence corruption.

Assist for IRQ stacks

Arising with a bounded worst case on which to base the scale of the kernel stack is relatively arduous, particularly given the truth that it’s shared between this system itself and any exception dealing with routines which may be known as on its behalf, together with interrupt handlers. To mitigate the danger of a pathological worst case occurring, the place an interrupt fires that wants quite a lot of stack house proper at a time when many of the stack is already being utilized by this system, we’re additionally enabling IRQ_STACKS for 32-bit ARM, which is able to run handlers of each arduous and smooth interrupts from a devoted stack, one for every CPU. By decoupling the duty and interrupt contexts like this, the chance {that a} well-behaved program must be terminated as a result of stack overflow must be all however eradicated.

Conclusion

With these adjustments in place, kernel stack overflow safety will likely be accessible for all ARM techniques supported by Linux, together with historical ones just like the Risc PC or Netwinder, supplied that it runs a Linux distribution that’s maintaining with the occasions.

Nonetheless, counting on legacy {hardware} and software program comes with a threat, and despite the fact that we attempt to assist maintain customers of the 32-bit kernel as protected as we moderately can, it isn’t the best alternative for brand new designs that incorporate 64-bit succesful {hardware}.